Researcher Database

KUMAKI Takeshi

Department / Course College of Science and Engineering Department of Electronic and Computer Engineering

Title / Position Professor

Papers
1.	2018/03	Morphological methods in image processing for embedded processors │ Journal of Signal Processing │ 22 (2),pp.25-45 (Co-authored)
2.	2017/10	Hierarchical-masked image filtering for privacy-protection │ IEICE Transactions on Information & Systems │ E100-D (10),pp.2327-2338 (Co-authored)
3.	2017/01	Secure data processing with massive-parallel SIMD matrix for embedded SoC in digital-convergence mobile devices │ IEEJ Transactions on Electrical and Electronic Engineering │ 12 (1),pp.96-104 (Co-authored)
4.	2016/11	Method of video transcoding from MPEG-2 to HEVC with picture structure information │ Journal of Signal Processing │ 20 (6),pp.283-290 (Co-authored)
5.	2016/07	FPGA implementation and evaluation of ternary content addressable memory with individuality, │ Journal of Signal Processing │ 20 (4),pp.137-140 (Co-authored)
6.	2016/07	Low power AFE circuit supporting IR array sensor for human detection │ Journal of Signal Processing │ 20 (4),pp.133-136 (Co-authored)
7.	2016/04	An optical CAM-based separated BTB for a superscalar processor │ International Journal of Computer Theory and Engineering │ 8 (2),pp.122-128 (Co-authored)
8.	2016/01	Adaptive multi-directional max-plus algebra-based morphological wavelet transform │ Journal of Signal Processing │ 20 (1),pp.xxx (Co-authored)
9.	2015/07	Digital image forensics using morphological pattern spectrum │ Journal of Signal Processing │ 19 (4),pp.159-162 (Co-authored)
10.	2014/07	A method using CA-based pixel-level snakes for multiple-countour expantion │ Journal of Signal Processing │ 18 (4),pp.221-224 (Co-authored)
11.	2014/03	Development of compression tolerable and highly implementable watermarking method for mobile devices │ IEICE Transactions on Information & Systems │ E97-D (3),pp.593-596 (Co-authored)
12.	2013/10	Morphological pattern spectrum and block cipher processing based image-manipulation detection │ IEICE Trans. Nonlinear Theory and Its Applications │ E4-N (4),pp.1742-1754 (Co-authored)
13.	2013/07	Morphological pattern spectrum-based objects detection for protecting privacy │ Journal of Signal Processing │ (Co-authored)
14.	2013/03	ストリーム暗号CryptMTのデータ並列処理による高速化手法及びSIMD型組込みプロセッサによる実装と評価 │ 信学論 (D) │ J96-D (3),pp.495-505 (Co-authored)
15.	2012/11	Max-plus algebra-based morphological wavelet transform watermarking for highly-parallel processing with mobile embedded processor │ Journal of Signal Processing │ 16 (6),pp.547-556 (Co-authored)
16.	2011/11	Decomposition/Reconstruction acceleration of max-plus algebra-based morphological wavelet transform │ Journal of Signal Processing │ 15 (6),pp.425-434 (Co-authored)
17.	2011/10	A scalable massively parallel processor for real-time image processing │ IEEE J. Solid-State Circuits │ 46 (10),pp.2363-2373 (Co-authored)
18.	2011/09	Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems │ IEICE Transactions on Information & Systems │ E94-D (9) (Co-authored)
19.	2008/09	Integration architecture of content addressable memory and massive-parallel mem-ory-embedded SIMD matrix for versatile multimedia processor │ IEICE Transactions on Electronics │ E91-C (9),pp.1409-1418 (Co-authored)
20.	2007/08	Acceleration of DCT processing with massive-parallel memory-embedded SIMD matrix processor │ IEICE Transactions on Information & Systems │ E90-D (8),pp.1312-1315 (Co-authored)
21.	2007/01	Scalable FPGA/ASIC implementation architecture for parallel table-lookup-coding using multi-ported content addressable memory │ IEICE Transactions on Information & Systems │ E90-D (1),pp.443-452 (Co-authored)
22.	2007/01	Real-time Huffman encoder with pipelined CAM-based data path and code-word-table optimizer │ IEICE Transactions on Information & Systems │ E90-D (1),pp.421-433 (Co-authored)
23.	2006/10	A flexible multiport content-addressable memory │ Systems and computers in Japan │ 37 (11),pp.57-67 (Co-authored)
24.	2004/01	A flexible multi-port content addressable memory │ IEICE Transactions on Information & Systems │ J87-D-I (1),pp.12-21 (Co-authored)